Junior Research Fellowship Vacancy At MNIT

Applications are invited from Indian citizens for a temporary of post of Junior Research Fellowship for the SERB sponsored project in the Department of Electronics and Communication Engineering, MNIT Jaipur, Jaipur, Rajsthan-302017, India with the details mentioned below:

1. Title of the Project: Impact of Lateral Straggle on the Logic Gates, SRAM, and Ring Oscillator in Silicon on Insulator (SOI) Tunnel FET

2. Project sanction number : SRG/2019/000628

3. Name of the Post : Junior Research Fellowship

4. No. of Posts : One 1

5. Duration : For a period of 6 months only

6. Essential Qualifications : ME/M.Tech in Electronics and Communication Engineering (with a specialization in Microelectronics and VLSI) with 60% or 6.5 CGPA

7. Fellowship : Rs. 31,000 /- Per Month

8. Other Qualification and Experience Details : a) Should have GATE Qualified Certificate

b) Should have sound knowledge of Advanced MOSFET like Tunnel FET, FinFET.

c) Expertise in Technology Computer Aided Design (TCAD) Sentaurus Simulator.

d) Excellent written and oral communication skills.

e) Should have strong motivation and commitment towards research.